发明名称 |
Scalable multimedia platform architecture |
摘要 |
The scalable platform architecture of the present video processing system invention includes a bus for transmitting data between various video processing subsystems. A graphics processing subsystem is coupled to the bus. A central processing unit is coupled to the bus and performs video processing. The graphics processing subsystem is adapted to receive a video memory and to perform video processing when the video memory is received. The bus is provided with expansion connectors for detachably coupling to a video processing subsystem and a video capture system. The addition of the video processing subsystem and/or video capture subsystem accelerates the processing of the video processing system by performing video processing that would otherwise be performed by the central processing unit.
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申请公布号 |
US5335321(A) |
申请公布日期 |
1994.08.02 |
申请号 |
US19920901383 |
申请日期 |
1992.06.19 |
申请人 |
INTEL CORPORATION |
发明人 |
HARNEY, KEVIN;LIPPINCOTT, LOUIS A. |
分类号 |
G06F3/14;G06F13/42;G06T11/00;G09G5/36;(IPC1-7):G06F15/20 |
主分类号 |
G06F3/14 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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