| 摘要 |
XOR and XNOR logic gates each include a first MOS pass device coupled between a first input and the output of the logic gate, and second MOS pass device coupled between a second input and the output of the logic gate. The control input of the first pass device is coupled to the second input and the control input of the second pass device is coupled to the first input. First and second logic signals are coupled to first and second inputs, respectively. First and second input signals are also coupled to third and fourth MOS devices, respectively. Third and fourth MOS devices are coupled in series between the logic gates output and a reference potential. The first and second MOS pass devices have the opposite channel type than the third and fourth MOS devices such that the XOR gate includes first and second PMOS pass gates and third and fourth NMOS devices. The XNOR gate includes first and second NMOS pass gates and third and fourth PMOS devices.
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