| 摘要 |
A synchronization signal detector (52) for detecting synchronization signals or frame synchronization signals recorded on a recording medium includes a binary-valued signal detector (2) for translating RF signals into binary-valued signals, an edge detection circuit (3) for extracting edge portions of the binary-valued signals, a counter (6) for counting the number of clocks generated by an external source between the edge portions, a number of latch circuits (5I - 5N) for holding successive clock count values between the edge portions and for successively shifting the clock values held by them, value coincidence circuits (7O - 7N) for comparing the numbers of clocks between transitions of the synchronization patterns and the clock count values held by the counter (6) and the latch circuits (5I - 5N) and for outputting a signal indicating a coincidence in case of complete coincidence between the numbers of clocks and the clock count values, and an AND circuit (8) for taking a logical sum of the outputs of the value coincidence circuits and the edge detector (3) for producing a detection output of the synchronization signal. The synchronization signal may be detected efficiently with a short delay time and by a simple circuit construction even if the synchronization signal pattern is of a longer length. A demodulator utilizing the synchronization signal detector is also disclosed. <IMAGE> |
