| 摘要 |
A multi-channel frequency synthesizer comprises first, second, and third phase-locked loop circuits. The loop gains of the second and third phase-locked loop circuits are set higher than that of the first phase-locked loop circuit. Furthermore, a phase adjustment circuit is provided in the first phase-locked loop circuit. The second phase-locked loop circuit is activated before changing the channel. During the channel switching operation, the third phase-locked loop circuit transforms the frequency quickly on the basis of an output of the second phase-locked loop circuit. After being switched to the first phase-locked loop circuit, the phase adjustment operation is carried out. Thus, this frequency synthesizer makes it possible to realize the speedy inter-channel frequency switching operation without causing deterioration in other characteristics such as S/N or C/N in the normal condition.
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