发明名称 |
Built-in fault testing of integrated circuits |
摘要 |
Built-in current mode quiescent current monitoring circuitry is provided for measuring a circuit's or a subcircuit's quiescent current. Anomalously high quiescent current (Iddq) generally results as a consequence of a manufacturing defect. These defects include those not detected by tests generated using traditional fault models. The technique provided here is based upon generating a proportionally matched current to the circuit under test current by a control loop. The proportionally matched current is then sent to a comparator where it is compared to a reference current, the reference current representing an acceptable quiescent current level. The output of the comparator then indicates whether the quiescent current is above or below the reference current.
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申请公布号 |
US5332973(A) |
申请公布日期 |
1994.07.26 |
申请号 |
US19920876790 |
申请日期 |
1992.05.01 |
申请人 |
THE UNIVERSITY OF MANITOBA |
发明人 |
BROWN, BRADLEY D.;MCLEOD, ROBERT D.;THOMSON, DOUGLAS J. |
分类号 |
G01R31/30;(IPC1-7):G01R31/00 |
主分类号 |
G01R31/30 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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