发明名称 ENCODER PULSE CHECKER
摘要 PURPOSE:To enable the detecting of the omission of a pulse instantaneously and accurately with a simple hardware detection circuit by adding a pulse calculated value of one phase to a complement of a pulse calculated value of the other phase. CONSTITUTION:Among a counter 1 for counting a pulse of a phase A and a counter 2 for counting a pulse of a phase B of a pulse encoder, a complement of an output value of the counter 2 is taken with an inversion circuit 3 to add the output value to an output value of the counter 1 with an adder 4. In the normal operation, a value of the adder 4 is any of 1111b, 1110b and 0000b. But when an pulse omission occurs in a detection pulse, lower two bits give 01b. When the outputs of terminals S1 and S0 give 01b, an abnormality detection circuit 5 outputs a LOW signal, namely, an abnormality detection signal. Thus, the omission of any pulse can be detected instantaneously and accurately with a simple hardware detection circuit and application for a machine tool or a robot controller achieves a prevention of work or a machine or higher safety or higher controlling accuracy.
申请公布号 JPH06207836(A) 申请公布日期 1994.07.26
申请号 JP19920213340 申请日期 1992.07.17
申请人 YASKAWA ELECTRIC CORP 发明人 NAKAO YOSHIYUKI
分类号 G01D5/245;G01D5/244;H03K21/40;(IPC1-7):G01D5/245 主分类号 G01D5/245
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