| 摘要 |
<p>PURPOSE: To suppress the increase of an output high level voltage at the time of the increase of a supply voltage by eliminating the fluctuation of the high level voltage due to the fluctuation of the supply voltage. CONSTITUTION: An NMOS transistor TR 13 is always turned on, and consequently, a PMOS TR 14 is turned on also. When an enable signal is in the low level, a PMOS TR 5 is turned on, and an NMOS TR 8 is turned on. Consequently, an input signal IN is inverted and buffered by a PMOS TR 6 and an NMOS TR 7 and is outputted when being inputted. In this case, a PMOS TR 9 is turned on, and the gate electrode potential of the TR 14 is linearly increased by the supply voltage. Consequently, the open width of the channel of the TR 9 can be adjusted. Thus, the high level of the output signal is adjusted.</p> |
