| 摘要 |
Circuitry for handshaking between a command state machine and write state machine is described. The handshaking circuitry, the command state machine and the write state machine are part of a non-volatile semiconductor memory device that includes a memory array. The command state machine receives commands from a user and communicates valid commands to the write state machine, which responds by performing automated program and erasure operations on the memory array, as appropriate. The command state machine identifies valid commands based upon signals generated by the handshaking circuitry. The handshaking circuitry includes three latches, an OR gate and a NAND gate. The serially coupled latches store an idle signal from the write state machine. The OR gate is coupled to outputs from the second and third of the serially coupled latches and generates a signal indicative of the whether the write state machine is idle. The NAND gate generates another signal indicative of whether the write state machine is busy based upon a start signal, a finished signal and a delayed idle signal. Also described are a method of handshaking between the write state machine and the command state machine and circuitry for powering up and powering down the write state machine.
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