| 摘要 |
<p>PURPOSE:To read out information at high speed while suppressing the enlargement of a chip in an EPROM (Erasable Programmable ROM) and the like. CONSTITUTION:Both ends of a PMOS transistor 52 are respectively connected to a intermediate point of a word line W1 and a signal line 51 for pull up, and a gate electrode is connected to a word line W1 via an inverter 53. Further, both ends of a NMOS transistor 62 are respectively connected to a intermediate point of a word line W1 and ground, and a gate electrode is connected to a signal line 61 for pull down. At the time of reading out information, the transistor 52 is turned on and boosting of an ordinary voltage signal (5V) of the word line W1 is accelerated, while the transistor 62 is turned on and voltage drop is accelerated. And at the time of programming, a high voltage signal (10-15V) is transmitted along the word line W1 as it is by turning off the transistor 52. Since transistors 52 and 62 do not participate in transmission of the high voltage signal, miniaturization may be allowed.</p> |
