发明名称 IMAGE DISPLAY CONTROLLER
摘要 <p>PURPOSE:To output display data to an image display device at a high speed by decreasing the necessary number of dual-port memories and making good use of good display data rewriting efficiency of the dual-port memories. CONSTITUTION:When the address of display data supplied into the image display controller from a CPU 1 is an address for an upper screen, the least significant digit bit of the row address counter of a memory address control part 7 is fixed at 0 and when the address of the supplied display data is an address for a lower screen, the least significant digit bit of the row address counter is fixed at 1, so that the display data for the upper screen of a two-divided screen panel and the display data for the lower screen can be held in a dual-port memory 15 alternately, line by line.</p>
申请公布号 JPH06202616(A) 申请公布日期 1994.07.22
申请号 JP19930001017 申请日期 1993.01.07
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 ISHII HIDEKI
分类号 G06F3/048;G06F3/14;G06F3/153;G06T1/60;G09G5/00;G09G5/36;(IPC1-7):G09G5/36;G06F15/64 主分类号 G06F3/048
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