| 摘要 |
PURPOSE: To provide a method and device for early quotient calculation in division. CONSTITUTION: This method and device contain a quotient digit generator, asynchronous shift registers 12a to 12d and a remainder comparison block. Every quotient digit is transferred in order to the different registers 12a to 12d in its generation mode. The digit is instantaneously transferred to the next largest effective digit position of each shift register. The digit is repeated at places closer to of all the least effective digit positions during its transfer. When a digit generation cycle is finished, the remainder comparison block discriminates whether the current remainder value is equal to that of the last section when all registers 12a to 12d receive a new digit respectively. If both remainder value are not equal to each other, the comparison block sends reset signals to all registers 12a to 12d and also sends a reset space via each of registers 12a to 12d which reset duplications of all sent last digits. Then, each register prepares for receiving a quotient digit row in the next section. If both remainder value are equal to each other, the comparison block stops generation of the quotient digit. Thereafter, a relation of each cell of shift registers is canceled to generate the final quotient solution that makes all aligned digits effective and proper. |
