发明名称 |
Memory control device |
摘要 |
A memory control device for controlling writing and reading data in and from a line memory made up of a plurality of FIFO memories. Writing clocks are circularly applied to the plurality of FIFO memories of the line memory. Also, reading clocks are circularly applied to the plurality of FIFO memories. Thus, although data written in the FIFO memories are discrete, data circularly read from the plurality of FIFO memories are sequential in such order as they are written in the line memory.
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申请公布号 |
US5331598(A) |
申请公布日期 |
1994.07.19 |
申请号 |
US19920987159 |
申请日期 |
1992.12.08 |
申请人 |
MATSUSHITA, TSUKASA;SHIMATANI, AKIRA |
发明人 |
MATSUSHITA, TSUKASA;SHIMATANI, AKIRA |
分类号 |
H04N1/21;G06F5/16;G06T1/60;(IPC1-7):G11C7/00 |
主分类号 |
H04N1/21 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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