| 摘要 |
<p>PURPOSE:To reduce erroneous input while alleviating labor for acquiring knowl edge by receiving signal processing and logical processing algorithms for the process amounts, at a part optimal for logical description, in the form of graphic language and then converting the graphic language into source codes. CONSTITUTION:Graphic data of logic is converted into connecting information data for each basic operational element and a logic converter 12 substitutes the connecting information data for one program module thus generating logical operation codes 13 for each frame which are converted into a logical operation module 14. An inference engine 15 then passes a plant data or host frame likelihood which is described as verification condition through calling of the module 14 for every cause frame by an abnormal frame triggered by an alarm delivered from a measurement controller PT or a prealarm generated from a preprocessing section 17 or an input processing frame. The inference engine 15 receives cause likelihood from the module 14 and determines the likelihood of causes triggered in series which is then normalized 20 and a most likely candidate of cause is displayed, along with the likelihood thereof, on a terminal TM2.</p> |
