发明名称 Single poly EE cell with separate read/write paths and reduced product term coupling
摘要 A single poly EE cell and an array using said cell, with the array being provided electrical connections such that the select gate for the read select transistor and the select gate for the write select transistor may be separately controlled. In the array, first level metal is utilized for connection to the gates of the read and write select transistors and second level metal is utilized for connection to the product term connections of the cell.
申请公布号 US5331590(A) 申请公布日期 1994.07.19
申请号 US19910777769 申请日期 1991.10.15
申请人 LATTICE SEMICONDUCTOR CORPORATION 发明人 JOSEPHSON, GREGG R.;BOWER, DOUGLAS H.;TENNANT, DAVID L.
分类号 G11C16/04;H01L21/8247;H01L27/115;(IPC1-7):G11C11/40 主分类号 G11C16/04
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