| 摘要 |
PURPOSE:To obtain a gate array type semiconductor integrated circuit device which has basic cells in which the same number of P-MOS transistors and N-MOS transistors are contained and in which the P-MOS transistors left unused when the memory cell of a RAM is composed are used to compose the memory cell of ROM. CONSTITUTION:In a memory part 20 which contains memory cells, P-MOS transistors which are left unused when the memory cell (A) of a RAM is composed are used to compose the memory cell (0) of a ROM. That is, the gate terminals of the unused P-MOS transistors are connected to a newly provided ROM WORD line 22b, the source terminals of the unused P-MOS transistors are connected to a power supply terminal and, further, the drain terminals of the unused P-MOS transistors are connected to or disconnected from a BIT line (B) in accordance with stored data. A selection signal is supplied to the ROW WORD line 22 only when the ROM is selected by a RAM/ROM changeover signal. |
