发明名称 Schaltungsanordnung für die Übertragung von digitalen Nachrichtensignalen über ein nach einem asynchronen Transfermodus arbeitendes Breitband-Kommunikationssystem
摘要 The wideband communications network allows digital signals to be transmitted as information packets, with a packeting/depacketing device (P/D) at each system interface. Each of these devices has a counter (LG) with a fixed count period, the obtained count value acting as a time marking for the information packets. A buffer memory (PS) associated with each packeting/depacketing device provides temporary storage of the information packets handled by the wideband communication network (UES), its capacity equal to the max. number of packets transmitted in an interval corresp. to the max. packet propagation time variation. A counter (ZA) is associated with each buffer memory (PS) providing a time marking for the mean packet propagation time and indexed together with the first counter (LG). ADVANTAGES - Ensures original time sequence of transmitted packets is maintained.
申请公布号 DE4132518(C2) 申请公布日期 1994.07.14
申请号 DE19914132518 申请日期 1991.09.30
申请人 SIEMENS AG, 80333 MUENCHEN 发明人 DIETER, GEORG, DIPL.-ING., 8195 EGLING;VOS, LUDGER, DIPL.-ING., 8000 MUENCHEN
分类号 H04J3/06;H04J3/24;H04L12/56;H04Q11/04;(IPC1-7):H04J3/00;H04L5/22 主分类号 H04J3/06
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