| 摘要 |
Reset pulses are to be generated independently of a general reset system provided in a digital circuit to be operated by closing a switch and serve for resetting primarily only one portion of the digital system to be driven, so that that portion is reset into the initial digital condition, whereas the remaining portion of the system continues to cycle unfluenced by such reset pulses. In one embodiment a quasi-stationary shift register cell operates to provide the reset pulses in conjunction with an output gate and in another embodiment a modified master-slave flip-flop cell provides the reset pulses, also in conjunction with an output gate. |
