| 发明名称 |
Process for manufacturing a ROM cell with low drain capacitance |
| 摘要 |
A process which provides for the creation of regions of source and drain having different doping, wherein the doping, and thus the capacitance, of the drain regions is lower than that of the source regions.
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| 申请公布号 |
US5328863(A) |
申请公布日期 |
1994.07.12 |
| 申请号 |
US19910668873 |
申请日期 |
1991.03.13 |
| 申请人 |
SGS-THOMSON MICROELECTRONICS, S.R.L. |
发明人 |
CAPPELLETTI, PAOLO;LUCHERINI, SILVIA;VAJANA, BRUNO |
| 分类号 |
H01L21/8247;H01L21/8246;H01L27/112;H01L27/115;(IPC1-7):H01L21/70;H01L27/00 |
主分类号 |
H01L21/8247 |
| 代理机构 |
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代理人 |
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| 主权项 |
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