| 摘要 |
<p>PURPOSE: To improve information transmitting speed by precharging the output pad of an integrated circuit chip on which a logical information element added in a memory appears in an intermediate value between a logical high level and a logical low level. CONSTITUTION: A precharge circuit is provided with a circuit for storing the logical value of a preceding stage in a pad IOPAD. The circuit is provided with, for example, an inverter 17 and the inverter 17 is connected to another inverter 18 with higher resistance in parallel. The input(the input of the inverter 17) of the recording circuit is connected to the pad by a transfer gate PT7 which is turned on during a reading stage LECT. A storage circuit stores the state of the pad during the reading stage. The output (the output of the inverter 17) of the storage circuit is connected to the first input of a NAND gate PL1 and the first input of an NOR gate PL2. Therefore, inversion is executed by the inverter 17 so that transfer is executed to the inputs of the NAND and NOR gates.</p> |
