发明名称 ADDRESS CONVERTING CIRCUIT AND ORTHOGONAL CONVERTING CIRCUIT EQUIPPED WITH THE SAME
摘要 <p>PURPOSE:To reduce the storage capacity of a 1st semiconductor storage device and reduce the circuit scale by inserting inversion/ noninversion circuits before and behind the 1st semiconductor storage device. CONSTITUTION:The inversion/noninversion circuit 17 consists of an inverting circuit 5 equipped with inverters 51-55 and a selector 6 equipped with changeover switches 61-65. The output terminals of the changeover switches 61-65 are connected to RC1-RC5 of an address conversion ROM 15A. The inversion/ noninversion circuit 18, on the other hand, consists of an inverting circuit 7 equipped with inverters 70-75 and a selector 8 equipped with changeover switches 80-85. The input terminals of the inverters 70-75 are connected to RA0-RA5 of the address conversion ROM 15A. The changeover switches 80-85 are controlled with a zigzag address CO. This constitution can convert a zigzag address C into a raster address A irrelevantly to the value of CO by using the address conversion ROM 15 whose storage capacity is a half as large as before.</p>
申请公布号 JPH06187369(A) 申请公布日期 1994.07.08
申请号 JP19920334084 申请日期 1992.12.15
申请人 FUJITSU LTD 发明人 YAMASHITA KOICHI
分类号 H03M7/30;G06F17/14;G06T1/60;G06T9/00;H04N1/41;H04N19/42;H04N19/423;H04N19/426;H04N19/60;H04N19/625;(IPC1-7):G06F15/332;G06F15/64;G06F15/66;H04N7/133 主分类号 H03M7/30
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