发明名称 INSTALLATION STRUCTURE OF SEMICONDUCTOR ELEMENT
摘要 PURPOSE:To enable mounting two bare chips in an occupied area necessary to mount one bare chip, and improve the mounting density of bare chips, by fixing a first and a second bare chips with adhesive agent so as to face each other, and connecting the respective bumps with one ends of inner leads. CONSTITUTION:A first bare chip 2 and a second bare chip 4 which are so stacked that bumps 3 and 5 face each other are provided. Inner leads 6 wherein one ends of the leads are clamped by the bumps 3, 5, and the other ends are fixed to a foot pattern 8 of a substrate 1 are provided. Adhesive agent 7 buried in the part between the first and the second bare chips 2, 4 is provided. Hence the first and the second bare chips 2, 4 are mounted on the substrate 1 via the inner leads 6. Thereby the mounting amount of bare chips for a specified substrate is increased, so that miniaturization is enabled. Since the two bare chips are fixed with the adhesive agent, a potting process for protecting the circuit surface of the bare chip is unnecessary.
申请公布号 JPH06188362(A) 申请公布日期 1994.07.08
申请号 JP19920334796 申请日期 1992.12.16
申请人 FUJITSU LTD 发明人 WATANABE TAKESHI
分类号 H01L25/18;H01L25/065;H01L25/07;H05K1/18;(IPC1-7):H01L25/065 主分类号 H01L25/18
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