发明名称 |
INTER-HIERARCHY SYNCHRONIZING SYSTEM AND AN LSI USING THE SAME SYSTEM |
摘要 |
An inter-hierarchy synchronizing system and an LSI include a plurality of function blocks taking a hierarchical structure and having timing systems expressed by timing variables independent of each other and inter-hierarchy synchronizing blocks disposed these hierarchies. This synchronizing block has: an input event temporary storage part for receiving and storing an input event generation signal group from a higher-level block; an activation timing judging part for judging activations of a plurality of function blocks and transmitting activation signals; an output event temporary storage part for receiving and storing output event generation signals including a completion signal from lower-level blocks; and a final completion signal judging part for judging a final completion state on the basis of a signal from the output event temporary storage part and transmitting a final completion signal to the high-block. The pre-designed function blocks are operable at a high speed without undergoing an influence by a delay of clocks. <IMAGE> |
申请公布号 |
EP0560385(A3) |
申请公布日期 |
1994.07.06 |
申请号 |
EP19930104056 |
申请日期 |
1993.03.12 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
SHIRAISHI, HAJIME |
分类号 |
H01L21/82;G06F1/10;G06F1/12;G06F9/52;G06F15/16;G06F15/173;G06F15/177;G06F17/50;H01L27/02 |
主分类号 |
H01L21/82 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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