| 摘要 |
An MOS transistor having an LDD structure is constructed in a first active region for a peripheral circuit in alignment with a first gate, by using as a mask a second active region for a memory cell. After forming a first interlayer insulating layer, a second gate having a floating gate and a control gate is formed in the second active region. A third insulating layer formed on the surface including the second gate is patterned to form a contact hole bounded by a sidewall of a side face of the second gate. <IMAGE> |
