| 摘要 |
The circuit consists of a pullup transistor (5), a pulldown transistor (6), a data input circuit (80), a data output buffer (10) for outputting the first output signal (1) and the second output signal (2), OR circuit (50) for oring the first output signal (1), the second output signal (2) and a inverted enable signal, AND circuit (60) for doing logical AND with the first output signal (1), the second output signal (2) and an enable signal, and a multiplexing circuit (70) which has a pullup part and a pulldown part. The pullup part has output of the OR gate (50) and an external signal (X'A) as the first and the second control voltage, and the pulldown part has output of the AND gate (60) and an external signal (X'A) as the first and the second control voltage.
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