发明名称 Clock supply apparatus
摘要 A clock supply apparatus provided in each slave office, wherein a single master clock is received at a clock receiver unit; 0-system and 1-system system clocks are paired and are distributed to the transmission units at terminal ends via a plurality of duplexed clock supply routes; and multistage clock selection units are hierarchically inserted into the duplexed clock supply routes. The system-selection unit for controlling the selection of the 0-system or 1-system at each clock selection unit is given a 0-system and 1-system duplexed structure and is constituted by a system switching command unit for instructing this system-selection.
申请公布号 US5327402(A) 申请公布日期 1994.07.05
申请号 US19930055676 申请日期 1993.04.30
申请人 FUJITSU LIMITED 发明人 SHINOMIYA, TADANAO
分类号 H04L1/22;H04J3/06;H04L7/00;H04Q11/04;(IPC1-7):G04C11/00;G04C13/00 主分类号 H04L1/22
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