发明名称 |
Video-memory control apparatus. |
摘要 |
<p>A video-memory control apparatus produces, in digital processing, e.g. digital filtering, of video signals with a plurality of processors, an improved video memory control signal which is in phase with its corresponding video data containing a delay attributed to the digital processing and delivers it to a video memory (e.g. a line or frame memory) coupled to each of the processors as a delayer. In the video-memory control apparatus, a first counter circuit waits for a period of time which is equal to the delay thus to retard the counting action of both a second counter circuit (i.e. a dot counter) and a third counter circuit (i.e. a line counter), whereby the video memory control signal will be released at best timing.</p> |
申请公布号 |
EP0604059(A2) |
申请公布日期 |
1994.06.29 |
申请号 |
EP19930309821 |
申请日期 |
1993.12.07 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD |
发明人 |
NAKAI, SEIJI;KUBOTA, MASASHI;NISHIO, TOSHIROH;SUZUKI, HIDEKAZU |
分类号 |
G06T1/20;G06T1/60;G06T5/20;H04N5/907;(IPC1-7):H04N5/76 |
主分类号 |
G06T1/20 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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