发明名称 Write precompensation with frequency synthesizer
摘要 A write precompensation circuit employs a frequency synthesizer for providing a variable timing signal linked to variable transfer rate in a track zone recording system of a disk drive. The synthesizer also provides an operating frequency current sense signal that is used to generate bit shift of data bits being recorded. A ramp voltage on a ramp capacitor and a logic signal from a bit shift decision circuit are determinative of the magnitude and direction of bit shift, early or late. The VCO and its capacitor are formed on the same IC chip as the ramp capacitor thereby minimizing mismatch due to tolerances inherent in production and operation of electrical components.
申请公布号 US5325241(A) 申请公布日期 1994.06.28
申请号 US19910715616 申请日期 1991.06.14
申请人 FUJITSU LIMITED 发明人 MATTISON, RODNEY A. L.;NORTON, JR., DAVID E.
分类号 G11B5/09;G11B20/10;G11B20/12;G11B20/14;(IPC1-7):G11B5/09 主分类号 G11B5/09
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