发明名称 Method and arrangement for estimating data sequences transmsitted using Viterbi algorithm
摘要 To reduce the number of operations required for estimating a transmitted data sequence using a Viterbi algorithm, a method and apparatus are provided for (a) storing a plurality of sampled values of an incoming signal in a shift register in a predetermined interval; (b) receiving a plurality of the sampled values from the shift register, and estimating channel responses, at a current time point, of a plurality of first signal sequences which are derived from the plurality of sampled values and each of the length of which is reduced by deleting at least one sampled data at the oldest time point; (c) receiving the channel responses estimated at (b) and checking to see if each of the estimated channel responses is determinate, producing a first signal sequence if an estimated channel response of a first signal sequence is found determinate, and producing an estimated channel response as a first signal sequence at a time point preceding the current time point in the event that the estimated channel response of the first signal sequence is found indeterminate; (d) storing the first signal sequences produced at (c), and producing an estimated channel response which has been stored at a time point preceding the current time point; and (e) determining a plurality of branch metrics using the estimated channel response obtained at (c) and an original first signal sequence before the original first signal sequence is reduced in length.
申请公布号 US5325402(A) 申请公布日期 1994.06.28
申请号 US19920876326 申请日期 1992.04.30
申请人 NEC CORPORATION 发明人 USHIROKAWA, AKIHISA
分类号 H04L25/03;(IPC1-7):H04L27/06 主分类号 H04L25/03
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