发明名称 |
Method of fabricating an electronic interconnection |
摘要 |
Disclosed is a method of fabricating an electronic interconnection structure comprising at least one solder column Joined to an I/O pad of a substrate, the method including the steps of: (a) applying a quantity of solder to the solder column or I/O pad; (b) aligning the solder column with the I/O pad such that there is a quantity of solder between them; (c) heating the structure to cause the solder to melt and bond the column to the I/O pad; and (d) planarizing the solder column to a predetermined height. Also disclosed is the electronic interconnection structure made by the method according to the invention. |
申请公布号 |
US5324892(A) |
申请公布日期 |
1994.06.28 |
申请号 |
US19920926494 |
申请日期 |
1992.08.07 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
GRANIER, FRANCOIS J.;RIEU, JEAN-JACQUES M.;RAOUT, PHILIPPE;SANCHEZ, ANDRE |
分类号 |
H01L23/50;H01R4/02;H01R43/02;H05K3/34;H05K3/36;(IPC1-7):H05K1/00 |
主分类号 |
H01L23/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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