发明名称 CPU MOUNTED INTEGRATED CIRCUIT AND DEBUGGER
摘要 <p>PURPOSE:To improve a debugger in workability by monitoring data accessed by a CPU from the outside without increasing the number of circuits built in a CPU mounted integrated circuit and drawing out an inside bus to the outside. CONSTITUTION:A CPU 10 in a CPU mounted integrated circuit accesses a ROM and a RAM inside through an inside bus and at the same time accesses a ROM and a RAM provided in an outside debugger through an outside addressing part 22, an access data conversion part 24 and a serial interface 26 in a debugging mode. A RAM and a ROM used in the debugging mode are provided outside to improve the degree of integration. The number of input and output pins is not increased because of serial communication with the debugger.</p>
申请公布号 JPH06174802(A) 申请公布日期 1994.06.24
申请号 JP19920323489 申请日期 1992.12.03
申请人 KAWASAKI STEEL CORP 发明人 HARIGUCHI YOICHI;YONEDA HIDEKI
分类号 G01R31/317;G01R31/28;G06F11/28;G06F15/78;H01L21/822;H01L27/04;(IPC1-7):G01R31/28;G01R31/318 主分类号 G01R31/317
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