| 摘要 |
PURPOSE:To make it possible to form electrode contact regions easily and reliably by applying a very simple means even if a base semiconductor layer to be exposed selectively is thin and moreover, to prevent a complification of a process of manufacturing a high-speed semiconductor device from being caused. CONSTITUTION:An N-type InGaAs collector layer 32, an I-type In(AlGa)As collector barrier layer 23, an N-type InGaAs base layer 24, an RTB layer 25, an etching stopping layer 27, which is used also as an N-type GaSbAs impurity diffusion preventive layer in combination, and an N-type InGaAs emitter layer 26 are laminated in order on a semi-insulative InP substrate 21. Moreover, an emitter electrode 29 which conduction-leads out the layer 26, base electrodes 30, which into contact to the selectively exposed layer 24, and collector electrodes 31, which come into contact to the selectively exposed layer 22, are formed. |
