发明名称 Clock signal extraction
摘要 A signal is fed to a quartz (Q3) whose output (1) is supplied to a clipper (SQ) comprising a pair of transistors (TR5 and TR14) acting as a differential amplifier. The desired clock signal (CK) is obtained (on CKDB and CKDBN). The excitation signal at ECL level obtained from NRZ data, is applied to the circuit through a resistor that drives in current the filter (LC) tuned on the frequency to be extracted. The resistive impedance presented at resonance by the filter, added to the one of the polarisation inductance of the clipper differential downstream of the circuit, is placed in series with the quartz resonating at the same frequency, reducing its Q from 10,000 to about 1,000. The result is a sole filter with a Q of value suitable to the use.
申请公布号 AU5197493(A) 申请公布日期 1994.06.23
申请号 AU19930051974 申请日期 1993.11.29
申请人 ALCATEL N.V. 发明人 SEBASTIANO ADAMO
分类号 H04L;H04L7/033 主分类号 H04L
代理机构 代理人
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