| 摘要 |
The present invention provides a contactless flash EPROM array formed in a P-well in a diffused silicon substrate of N-type conductivity. To facilitate a channel erase operation, thin tunnel oxide is formed between the P-well and the overlying polysilicon floating gate EPROM cells. The array is programmed in a conventional EPROM cell array manner. However, in accordance with the invention, the channel erase of a selected row of EPROM cells is accomplished by allowing all bit lines to float, applying a negative erase voltage to the word line of the selected row and holding the substrate at the supply voltage. |
