发明名称 Accessing memory in HDLC communications protocol hardware machine system with server
摘要 The processor has the function of emulating the operation of a number of independent transmitter and receiver modules. The machine has an HDLC server (10) that consists of the HDLC machine (12), a microprocessor (14) and a RAM memory. The HDLC machine has three sub-systems, i.e. address logic (50), control logic (70) and an address generator (90). The microprocessor is a universal type with ports for input and output functions. The system operates to access the system memory and to analyse segments of data.
申请公布号 DE4341886(A1) 申请公布日期 1994.06.23
申请号 DE19934341886 申请日期 1993.12.08
申请人 ROLM CO., SANTA CLARA, CALIF. 发明人 CHEORGHIU, FLORIN, SAN JOSE, CALIF.;NGUYEN, CATHERINE, MILPITAS, CALIF.
分类号 G06F13/38;H04L12/56;H04L29/06;H04L29/08;(IPC1-7):G06F12/00;G06F13/42 主分类号 G06F13/38
代理机构 代理人
主权项
地址