发明名称 Kellosignaalin vaiheen siirto, erityisesti digitaalisen signaalin ajastuksen ilmaisua varten
摘要 Switching elements (38,40,42,44) have auxiliary clock signal inputs to receive clock signals. A selector circuit (46) receives a control signal from a control signal generator (2), and selects one of the switching elements, allowing one of the clock signals onto a common output (18). The control signal has a variable amplitude and polarity. The selector circuit comprises a logic control circuit, analogue switch and analogue selector which continuously tracks the amplitude and polarity of the control signal to select and activate the control output (48,50,52,54) responsible for switching a switching element.
申请公布号 FI943017(A) 申请公布日期 1994.06.22
申请号 FI19940003017 申请日期 1994.06.22
申请人 TELEFONAKTIEBOLAGET LM ERICSSON 发明人 HEDBERG, MATS
分类号 H03L7/06;H03K5/13;H03L7/08;H04L7/02;H04L7/033;H04L7/04;(IPC1-7):H03L;H04L 主分类号 H03L7/06
代理机构 代理人
主权项
地址