CIRCUITRY FOR MINIMIZING PEAK POWER IN AN AMPLIFIER CARRYING A PLURALITY OF SIGNALS OF DIFFERING FREQUENCIES

摘要

In plural channel amplifier systems processing many phase locked signals of different frequencies (on 111-114) as a combined signal (from 106), these signals may drift into a phase convergence causing a peak power occurrence in the amplifier (109) which greatly exceeds the rates capacity of the amplifier system. Therefore, in accord with the invention, a dynamic adjustment system is provided to minimize the peak power to which the amplifier (109) is subjected by adjusting (by means of 131-134) the relative phase relationships of the many signals. The dynamic adjustment system includes a peak power detector (153), a hard wired logic decision circuit (161) and a timing control (161) to control phase shift adjustment steps (on 171-174).