| 摘要 |
PURPOSE:To remarkably decrease the number of elements by constituting a parallel-series converting circuit by connecting in series a combination of plural pieces of flip-flops with a preset function, and 1/2 frequency dividers. CONSTITUTION:When a preset signal PR goes to '1', flip flops F1-F3 with a preset function latch a signal from an input terminal PL and output it to an output terminal Q. Also, when a clock signal C rises, said flip-flops latch a signal of an input terminal D, and output it to the output terminal Q. As for frequency dividers F5-F7, when a signal supplied to an input terminal T falls, the output terminal Q is inverted. The flip-flops F1-F4 are connected in series and parallel input terminals P2-P0 are connected to the flip-flops F1-F3, and from the flip-flops F4, a series output terminal OUT is fetched. In such way, the entirely same output as that of a conventional circuit is obtained, and as for the number of flip-flops with a reset function, three pieces will suffice. |
