| 摘要 |
An image signal processing apparatus inputs a video signal, delays it by one field using a field memory, multiplies the delayed signal by a value K (K less than 1), adds the output from the multiplication to the input signal and supplies the sum to the field memory. The level of the signal read out from the field memory is compared with a predetermined value, and based on the result of that comparison, the video signal being input is substantially inhibited from being supplied to the adding means. The signal obtained by multiplying the immediately-preceding field signal by k, and the present-field signal, are cyclically added, so that the amplitude can be gradually increased. The comparison inhibits addition of a new field signal when the level of that stored in the field memory has reached a predetermined level.
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