发明名称 Clock-synchronous semiconductor memory device and method for accessing the device
摘要 A method for accessing a clock-synchronous semiconductor memory device including memory cells arranged in matrix. The cells are divided into at least two blocks, access to the cells in these blocks is designated from address data provided from an external device, and access to the memory cell is executed synchronously with an externally-supplied clock signal, which comprises setting the other blocks in an access preparation state or in an access operation standby state while one block is in an access operating state, setting a certain block in the access operating state via the access preparation state when the certain block is designated for the access operation by the address data and if the certain block is in the access operating state, and setting a certain block in the access operating state immediately when the certain block is designated for the access operation by the address data and if the certain block is in the access preparation state or in the access operation standby state. In the device, the designation of the cell in the block to be accessed is set using address data designating a block externally-provided from outside of the device.
申请公布号 US5323358(A) 申请公布日期 1994.06.21
申请号 US19930024354 申请日期 1993.03.01
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 TODA, HARUKI;WATANABE, YUJI;KUYAMA, HITOSHI;SAITO, SHOZO
分类号 G11C11/407;G11C7/22;G11C8/18;G11C11/401;G11C11/41;H01L27/10;(IPC1-7):G11C7/00;G11C8/00 主分类号 G11C11/407
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