| 摘要 |
Circuit and method for synchronizing a clocked coded output signal with an iterative encoded input signal in a time relation that results in the greatest correlation. An AS (arithmetic synthesizer) initially produces a clock signal at a rate different from that of the input signal. The clock signal so produced drives a waveform generator that produces an iterative encoded signal similar in kind to the input signal. As the time (phase) relation between the generated signal and the input signal is varied, a correlation coefficient is derived at successive phase positions. The AS is then set into the condition of greatest correlation and synchronized with the input signal.
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