发明名称 NONLINEAR SYNAPSE CIRCUIT OF NEURAL NETWORK
摘要 The circuit is for a simple nonlinear synapse in place of complex Gilbert multiplier circuit of a neural network. It consists of an NMOS transistor (MOS1) of which drain and gate are connected to input signal and weight signal of the neuron for excitatory function, a PMOS transistor of which drain and gate are connected to the inverted input signal and weight signal of the neuron respectively for inhibitory function. The output signal of the synapse is transmitted to a sigmoid circuit (30) for producing output signal of the neuron and to a threshold circuit (20) which determines the threshold voltage of the neuron.
申请公布号 KR940005512(B1) 申请公布日期 1994.06.20
申请号 KR19920005051 申请日期 1992.03.27
申请人 KIM, JONG - DOK 发明人 CHOE, MYONG - RYOL
分类号 H03K19/013;(IPC1-7):H03K19/013 主分类号 H03K19/013
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