| 摘要 |
An input circuit arrangement for an integrated circuit includes an input circuit (121) which includes a first series summing amplifier having a first input which is connected to an input pad (161) for the integrated circuit and a second input which is connected to an output line (44) of a control voltage generating means (14). The control voltage generating means (14), which sets a highly stable, accurate threshold voltage for the input circuit (121), includes a second series summing amplifier having a first input connected to a voltage divider (42) which supplies a reference voltage, and a second input connected to the output line (44). The second series summing amplifier includes series-connected FETs (20,21,24,25) having transconductances matched to corresponding FETs (501,511,541,551) in the first series summing amplifier. <IMAGE> |
