发明名称 DIVIDING ARITHMETIC UNIT
摘要 PURPOSE:To reduce the power consumption by stopping the dividing operation and outputting a fixed value instead of the quotient at the time of detecting that the value of dividend data or/and divisor data are zero. CONSTITUTION:If either of a dividend zero detecting circuit 111 and a divisor zero detecting circuit 112 detects zero, multiplexers 121 and 122 are switched, and preceding dividend data and divisor data set to a dividend register 12 and a divisor register 14 just before this detection are set to the dividend register 12 and the divisor register 14 again through multiplexers 121 and 122. That is, values in the dividend register 12 and the divisor register 14 are not changed, and consequently, a restorative divider 16 consisting of a combinational circuit is not operated in this case. A multiplexer 131 is so switched that it outputs data where all of 16 bits are '0' or '1', and this data is set to a quotient register 18 and is outputted to the outside as quotient data.
申请公布号 JPH06168103(A) 申请公布日期 1994.06.14
申请号 JP19920320353 申请日期 1992.11.30
申请人 KAWASAKI STEEL CORP 发明人 KATSUMURA NORIMICHI
分类号 G06F7/537;G06F7/52;G06F7/535 主分类号 G06F7/537
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