| 摘要 |
A composite semiconductor integrated circuit device includes logic circuit blocks of a master slice system and function blocks such as memories all of which are integrated on a single semiconductor chip. The function blocks are constituted with n lower metal wiring layers. On a portion of a surface of the chip which overlaps with the function block, a (n+1)th metal layer is not provided as signal wiring, but a (n+2)th metal wiring layer or higher layers are provided. The step coverage of the metal wiring layers provided on the chip surface portion overlapping with the function block is improved and cross-talk between signal lines can be reduced.
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