| 摘要 |
PURPOSE:To reduce the generation of distortion by reducing the influence of the interelectrode capacitance of a semiconductor element as possible. CONSTITUTION:This method is constituted of the semiconductor element and a resistor to be inserted between electrodes. By parallelly inserting the resistor 4 to the interelectrode capacity between the emitter 3 and the collector 2 of a transistor 1, charging and discharging whose cause is the interelectrode capacitance are performed through the resistor, only a part decided by the value of the resistor is consumed and thus, charging and discharging time can be shortened. Also, since a time constant generated by the interelectrode capacitance and the parallel resistor is made small and the charging and discharging time can be shortened, output being distorted due to the delay of the output for input can be reduced and even the input changing faster can be tracked. The resistor 4 is parallelly inserted between a drain 2 and a source 3 in the case of FET1 and the resistor 4 is inserted between an anode 2 and a cathode 3 in the case of a diode. |
