INTEGRATED CAPACITANCE MULTIPLIER CIRCUIT

摘要

PURPOSE: To obtain an integrated capacitance multiplier circuit having large diversity and a small semiconductor area. CONSTITUTION: Two field-effect transistors M1 and M2 having different sizes are connected between the output and noninverted input of an operational amplifier Op in place of the two resistors connected in series and usually used in the conventional circuit. In addition, a bias circuit having at least two output nodes connected to the control gates of the two field-effect transistors is provided.