| 摘要 |
<p>PURPOSE:To enable to perform the exposing operation of high degree of fineness to the chips of large area by a method wherein a plurality of regions of the chip are exposed separately, and a pattern of relatively wide-widthed line is formed in the vicinity of the boundary of the plurality of regions. CONSTITUTION:The chip 1 of a memory storage has regions 1a and 1b which have been exposed separately. The center part and the circumferential part of said region 1a constitute a narrow-lined region 2a and a wide-lined region 3a. Also, the center part and the circumferential part of the region 1b constitute a narrow-lined region 2b and a wide-lined region 3b. A memory cell pattern is formed on the narrow-lined region 2a and the wide-lined region 2b. Also, on the wide-lined regions 3a and 3b, the patterns such as a driving circuit, a wiring part and the like of a pad are formed. Thus, at least the region in the vicinity of the boundary of the regions 1a and 1b, which are exposed separately, is turned to the wide-lined regions 3a and 3b, but the width of line of the pattern formed on the wide-lined regions 3a and 3b is formed as wide as 20mum or thereabout. Accordingly, even when the deviation of 0.4mum or thereabout at the largest is generated, this deviation can be allowed.</p> |
