发明名称 Low voltage input and output circuits with overvoltage protection
摘要 An input stage suitable for use with any desired supply voltage VCC, including supply voltages less than 5 volts, and which is capable of withstanding an overvoltage input signal greater than VCC applied to its input pad. A pass transistor is used between the input pad and the input buffer in order to limit the voltage supplied to the input buffer, thereby allowing voltages in excess of VCC to serve as a legitimate logical one input signal to the input buffer. Overvoltage protection is used to limit the voltage on the input pad to a voltage in excess of the greater-than-VCC legitimate input voltage. An output stage is suitable for use with a wide variety of supply voltages, including supply voltages less than 5 volts, while allowing proper operation in the event that a legitimate overvoltage is applied to its output pad. ESD protection is provided in order to limit the voltage on the output pad to a voltage greater than the maximum legitimate overvoltage. Cascode devices are used to limit the voltages seen by the pull up and pull down transistors when a legitimate overvoltage is applied to the output pad. Suitable transistor switches are used to prevent excessive current from being dissipated when a legitimate overvoltage is externally applied to the output pad when the output stage is in either the high impedance mode or the active high mode.
申请公布号 US5319259(A) 申请公布日期 1994.06.07
申请号 US19920994783 申请日期 1992.12.22
申请人 NATIONAL SEMICONDUCTOR CORP. 发明人 MERRILL, RICHARD B.
分类号 H03K19/003;(IPC1-7):H03K17/10 主分类号 H03K19/003
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