发明名称
摘要 <p>PURPOSE:To simplify a manufacturing process by a method wherein an insulating layer for selective polishing and a polycrystalline Si thin film are formed on an Si substrate and the polycrystalline silicon thin film, is patterned into an island shape and a TFT is formed on the island and a transparent insulating substrate is bonded to the TFT side and the Si substrate is removed and holes are drilled to form source and drain electrodes. CONSTITUTION:An insulating layer 2 for selective polishing is formed on an Si substrate 1 and a polycrystalline Si thin film 3 is formed on the insulating layer 2. The unnecessary part of the polycrystalline Si thin film 3 is removed to form the island shape Si thin film. Then a TFT containing source and drain regions 7 and 6 is formed on the island and a transparent insulating substrate 10 is bonded to the TFT side. Then, after the Si substrate 1 is removed by polishing and the insulating layer 2 for selective polishing, the TFT and the transparent insulating substrate 10 are left to form a thin structure, holes are drilled in the insulating layer 2 and source and drain electrodes 12 and 11 are formed so as to be brought into contact electrically with the source and drain layers 7 and 6. With this constitution, the manufacturing process can be simplified.</p>
申请公布号 JPH0642494(B2) 申请公布日期 1994.06.01
申请号 JP19880005233 申请日期 1988.01.12
申请人 NIPPON ELECTRIC CO 发明人 KANEKO SETSUO
分类号 H01L27/12;G02F1/133;G02F1/136;G02F1/1368;G09F7/02;H01L21/02;H01L21/336;H01L29/78;H01L29/786;(IPC1-7):H01L21/336;H01L29/784 主分类号 H01L27/12
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