Self-aligned via.

摘要

A method is provided for a self-aligned via of a semiconductor integrated circuit, and an integrated circuit formed according to the same. A conductive bilayer (26,28) is formed over a conductive structure and a portion of a first underlying interlevel dielectric layer (24). The conductive bilayer (26,28) is then patterned and etched, wherein a pillar (29) is formed at an upper surface of the bilayer (26,28). A second interlevel dielectric layer (30) is formed adjacent to the pillar (29) and over the remaining bilayer (26,28). The pillar (29) forms a conductive material within a self-aligned via.